Memory-Optimized DeHs
Overview
Memory-optimized DeHs are designed for processing large-scale data sets in the memory. They use the latest Intel Xeon Skylake CPUs, network acceleration engines, and Data Plane Development Kit (DPDK) to provide higher network performance. They provide a maximum of 512 GB DDR4 memory for high-memory computing applications.
Memory-optimized DeHs are classified into m3 and m6 DeHs.
- M6 ECSs can be deployed on m6 DeHs.
DeH Specifications
Flavor Type |
Number of CPUs (Sockets) |
Number of Physical Cores |
Hardware Specifications |
Number of vCPUs |
---|---|---|---|---|
m3 |
2 |
18 |
|
64 |
Flavor Type |
Number of CPUs (Sockets) |
Number of Physical Cores |
Hardware Specifications |
Number of vCPUs |
---|---|---|---|---|
m6 |
2 |
22 |
|
76 |
ECSs Allowed on DeHs
Flavor Name |
vCPUs |
Memory (GiB) |
---|---|---|
m3.large.8 |
2 |
16 |
m3.xlarge.8 |
4 |
32 |
m3.2xlarge.8 |
8 |
64 |
m3.3xlarge.8 |
12 |
96 |
m3.4xlarge.8 |
16 |
128 |
m3.6xlarge.8 |
24 |
192 |
m3.8xlarge.8 |
32 |
256 |
m3.15xlarge.8 |
60 |
512 |
m3.16xlarge.8 |
64 |
512 |
Flavor Name |
vCPUs |
Memory (GiB) |
Maximum Number of ECSs on a DeH |
---|---|---|---|
m6.large.8 |
2 |
16 |
37 |
m6.xlarge.8 |
4 |
32 |
18 |
m6.2xlarge.8 |
8 |
64 |
8 |
m6.3xlarge.8 |
12 |
96 |
6 |
m6.4xlarge.8 |
16 |
128 |
4 |
m6.6xlarge.8 |
24 |
192 |
3 |
m6.8xlarge.8 |
32 |
256 |
2 |
m6.16xlarge.8 |
64 |
512 |
1 |
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